1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device and, more particularly, to a method for manufacturing a semiconductor device utilizing a polycrystalline silicon layer as a resistive element.
2. Description of the Prior Art
As a semiconductor device which utilizes a polycrystalline silicon layer as a resistive element, a device as schematically shown in FIG. 1 is known. This device is manufactured by a method which includes a step of forming an insulating layer 12 on a semiconductor substrate 11 and forming a polycrystalline silicon layer 13 doped with a small amount of an impurity and thus having a high resistance. A predetermined portion of the polycrystalline silicon layer 13 is covered with a mask 14, and an impurity is doped to a high concentration through the exposed portion by thermal diffusion, so that parts 15, 15 of the polycrystalline silicon layer 13 are converted to electrically conductive layers. The undiffused portion is used as a resistive element. The semiconductor device is completed after undergoing the processes of formation and melting of a passivation layer, metallization, sintering and so on.
However, when an attempt is made to obtain a resistive element of length l with such a conventional method, the impurity formation of the conductive layers 15, 15 by thermal diffusion also diffuses in the lateral direction to reach beneath the mask 14, since the diffusion coefficient of the impurity in the polycrystalline silicon layer is much greater than in the bulk silicon. For example, when thermal diffusion is performed at 1,000.degree. C. for 30 minutes using phosphorus as an impurity, the diffusion reaches 5.mu. inside the end of the mask 14; when arsenic is used as an impurity, it reaches 3.mu. inside the end of the mask. Therefore, for obtaining a resistive element of length l, the mask must be of length l plus twice the lateral diffusion length, thereby obstructing ultrafine processing. Further, the distribution of the impurity is changed by the subsequent heat treatment required in the following process, so that such changes must be considered in the initial design of the mask 14 for processing with high precision.
In addition, with the conventional method, the resistance of the resistive element cannot be made large enough. As is well known, the conductive mechanism of polycrystalline silicon changes with the grain boundary characteristics of the adjacent crystal grains. Control of the resistance is difficult since these grain boundary characteristics are dependent on the growing conditions of the polycrystalline silicon, on the doping conditions and on the heat treatment conditions when an impurity is doped for obtaining high resistivity. Moreover, since the amount of the impurity to be doped is very small for higher resistivity, the resistivity changes abruptly relative to the doping concentration so that the control of the resistivity is even more difficult. Especially when the impurity is doped simultaneously with the growth of the polycrystalline silicon layer, that is, when the polycrystalline silicon layer is grown in the atmosphere containing the impurity, the resistivity becomes simultaneously dependent on the amount of the impurity and the growing conditions of the polycrystalline silicon layer. Thus, the sheet resistivity obtainable with good precision with the polycrystalline silicon layer produced by the conventional method has been limited to 1 M.OMEGA./.quadrature. at maximum.
When the resistance of the resistive element is thus small and a semiconductor device with such a resistive element is applied to, for example, load elements of a MOS static memory device of large capacity, the power consumption of the memory device becomes very large so that the device is virtually inoperable. If the length l of the resistive element is made large for avoiding this, the device must be made larger in size.